Close
Etteplan DDR Signal Integrity Simulations

DDR Signal Integrity Simulations

Bus performance is at the essence of maximizing PCU and memory performance

Memory buses on current electronics boards have become extremely fast requiring understanding on high speed signal behavior on printed circuit boards (PCB). Today capabilities of computers allow for desk top simulations of signal integrity on dense product PCBs. Often simulations find PCB issues on memory buses before the first protype is ordered. With signal integrity simulations on your PCB you ensure that your product is maximizing CPU and memory performance.

Key benefits
Knowledge of the DDR3/4 bus performance before ordering the prototype
Less prototype rounds results in faster time to market
Potentially lower total R&D cost
Minimized cross talk on the board
Lower power consumption due to lower bus current drive needed

Get Your Signal Integrity Simulations from Etteplan

Having poor performance on your PCB is like having bad speaker cables on your HiFi system. The sound performance or in this case the memory performance just isn’t the same.

Etteplan has the expertise and understanding on high speed signal behavior on PCBs and the capabilities to perform signal integrity simulations on your product. With our signal integrity simulations you can guarantee the performance of your PCB. Ask for more information.

DDR4 simulations

Simulation Phases

The memory simulation has multiple phases: design input, design simulation with ideal transmission lines, small signal simulation of PCB, large signal simulation with PCB and component models and eventually virtual compliance simulation. High frequency simulation of PCB and components match the real performance very well if nonidealities are present.

How we work?

Step 1: Kick-off

In the kick-off meeting we will discuss your simulation needs. The product and its structure is analyzed, and the contents of the simulation are discussed and agreed.

Step 2: Simulation phase

The simulation phase starts by transferring your PCB as well as the components and necessary simulation models to the simulation environment. Next, the simulation set up is performed including PCB stack-up. And lastly, your product is simulated in agreed simulation phases.

Step 3: Report and review of the results

After the simulations, we will create a report on your product design consisting of simulation setup, results and conclusions. Next, we will deliver the report to you and discuss the findings. Finally, we will make improvement recommendations on your design if necessary.

Inquire about our prices and sales packages

Pre-PCB order

  1. CPU-DDR3/4 design simulation with ideal transmission lines and IBIS models
  2. CPU-DDR3/4 small signal simulation with designed PCB for line impedances and signal integrity
  3. CPU-DDR3/4 non-linear transient simulation with designed PCB and IBIS models
  4. JEDEC virtual compliance simulation option

Post-PCB

  1. CPU-DDR3/4 small signal simulation with designed PCB for line impedances and signal integrity
  2. CPU-DDR3/4 non-linear transient simulation with designed PCB and IBIS models
  3. JEDEC virtual compliance simulation option
Jani Vauto

Jani Vauto

Director, Wireless Solutions
+358 46 851 5965
Send e-mail

Ask Jani Vauto a question or challenge us

When you submit this form, our specialist will be in touch with you by email or telephone. By submitting the form you accept our Privacy Policy.
CAPTCHA

DDR Signal Integrity Simulations - More from Etteplan